False Sharing Alignment
What is false sharing What is false sharing? When CPUs and their cores read and update atomic variables, special hardware protocols make it correct and efficient, while keeping each core’s caches consistent. The coordination doesn’t happen per-address: these protocols work on cache-line-sized chunks. What happens when two atomic variables happen to reside on the same cache line? For example: an array of atomics where each atomic is used by a separate thread (e.g. per-thread counters); a queue with two atomic pointers where a writer updates the tail and a reader updates the head. Of course, you declare both pointers in the same struct and they have adjacent addresses! Each update operation makes the cache line dirty and requires coordination between CPUs. The CPUs are essentially playing ping pong with the chunk of memory. ...